The project investigated a novel rapid‑melting solidification (RMS) bonding technique for microelectronic components, focusing on the integration of silicon, glass, and stainless‑steel substrates. The core of the study was the development and characterization of a zirconium‑silicon (Zr/Si) RMS layer that can be deposited by conventional sputtering or evaporation and subsequently melted to form a solidified bond. Experiments were carried out with a range of substrate pairings, including glass–stainless steel, silicon–stainless steel, and silicon–silicon, and with varying RMS thicknesses from 20 µm to 24 µm. The bonding process involved applying a pressure of 2.5 MPa to 10 MPa, optionally preheating the substrate to 100 °C, and using additional thermal barriers or contact metallization to control the reaction front.

Key technical results emerged from the series of bonding trials. In the first two series (HS‑1 and HS‑2) using 2.5 MPa pressure, complete reaction of the RMS was achieved, but cracks appeared in the glass and silicon substrates, even when a thermal barrier was added. Series 3 (HS‑3) introduced a polished silicon–stainless‑steel interface and an AlSi12 interlayer. This configuration produced a larger bond area of 36 mm² and eliminated cracks in silicon, though bubble formation in the AlSi12 layer persisted. Increasing the pressure to 5 MPa and 10 MPa in HS‑3 effectively suppressed bubble formation, demonstrating that higher bonding pressure can mitigate porosity. Series 4 (HS‑4) used silicon–silicon bonding with an AlSi10 interlayer; while bubble and pore formation were reduced at 5 MPa, some porosity remained at 10 MPa. Series 5 (HS‑5) and 6 (HS‑6) further refined the process by employing a 23.2 µm RMS and an active hard‑loft in the bond zone. HS‑5 achieved a crack‑free silicon bond with a thicker hard‑loft, whereas HS‑6 showed that bonding to substrate chips from series 6 failed unless the deck‑chip was from series 6 and the substrate from series 3, indicating sensitivity to chip compatibility.

Reaction front velocities were quantified by recording acceleration signals during bonding. For the safe process (HS‑3) the average front speed was about 24 m/s, whereas the new process achieved speeds exceeding 60 m/s, more than double the safe value. This acceleration is a direct consequence of the thinner RMS and higher pressure, which promote rapid melting and solidification.

The project also demonstrated that the RMS bonding can be performed with standard equipment already available in many small‑to‑medium enterprises, implying low additional capital investment. The process parameters identified—RMS thickness above 20 µm, pressure above 5 MPa, optional preheating—provide a reproducible recipe for reliable, crack‑free bonds in microelectronic assemblies.

Collaboration was led by the Fraunhofer Institute for Material and Radiation Technology (IWS) in Dresden, the Center for Microelectronics and Sensors (CiS) in Erfurt, and the Hahn‑Schickard Institute for Applied Research in Villingen‑Schwenningen. The project was funded under the German Federal Ministry of Economic Affairs and Climate Protection’s Industrial Community Research (IGF) program, project number 21347 BG, and supported by the Association of German Research Institutes for Applied Sciences (AiF). The research spanned from late 2020 to mid‑2023, with a series of virtual and in‑person workshops, presentations at industry conferences, and planned publications in peer‑reviewed journals. The consortium also outlined a transfer strategy to disseminate the findings to industry partners, including training sessions for SME employees and the publication of a final report and technical guidelines. This collaborative framework ensured that the scientific advances could be rapidly translated into industrial practice.